This invention relates generally to the fabrication of semiconductor devices and in particular to high-quality thin oxides formed on the surface of a semiconductor substrate.
The ability to manufacture high-quality oxides is of extreme importance in the production of semiconductor devices. As the need for ever thinner oxides has increased, the requirement for major improvements to obtain reliable ultra-thin oxide films has become vital. This is especially true in the tunnel oxides of Electrically Erasable Programmable Read-Only Memories (EEPROMs), where the oxide may be less than 100 xc3x85 thick. In order to improve these oxides, all phases of their manufacture continue to be examined for possible improvements.
In the silicon wafer production process, manufacturers use many differing procedures: however, these generically follow a standard series of steps including
0. Initial substrate clean
1. EEPROM oxidation
2. Mask and etch
3. Resist strip
4. Oxidation pre-clean
a) SC1
b) SC2
5. Form (oxidation) thin oxide
6. Polysilicon or amorphous silicon deposition and doping.
Here SC1 and SC2 refer to Standard (also known as RCA) Clean 1 and 2. SC1 is used to remove organic materials and traditionally consists of a mixture of NH4OH/H2O2/H2O in the concentration ratios of 1:1:5. SC2 is for removing metallic contaminants, and traditionally is the mixture HCl/H2O2/H2O, again in the concentration ratios of 1:1:5. Various water rinse and drying stages in between these steps are not shown.
Again, this is only the outline of the standard procedure. Due to the importance of high-quality thin oxides, many variations in the etch and pre-clean have been explored. The concentrations and compositions, times and temperatures, and order of steps are all parameters that have been studied and modified searching for improvements. Common variations include also having a HF pre-clean stage in addition to, or replacing, the RCA cleans.
The mask and etch step is done using a photoresist layer. This forms the patterned mask that determines those areas of oxide removed during the etch. The subsequent need to remove this photoresist and provide the cleanest possible surface for the thin gate oxidation is the purpose of the pre-clean. As the stripping of the photoresist is an inherently dirty process, the wafers are typically transferred to an additional piece of equipment to remove the resist layer, then transferred again, usually to a wet deck, for the last pre-clean step. This transference has been considered necessary for the best result during this important cleaning stage. Although this cleaning then takes place in a cleaner environment, the use of different apparatus in steps 2 through 4b unavoidably increases handling of the wafers, exposure to cleanroom air, and sit time between the clean and oxidation. This handling and exposure are detrimental to the wafers. In addition, this transference requires distinct pieces of equipment.
It is the primary object of the present invention to improve the quality of thin oxides by overcoming these limitations resulting from the amount of handling of the wafers, their exposure to cleanroom air, and time delays between clean and oxidation.
It is another object to accomplish these results with a reduction in the amount of apparatus required for processing the silicon wafers.
These and additional objects are accomplished by the various aspects of the present invention, wherein, briefly and generally, according to one such aspect, the etch and pre-clean processes of forming a high-quality thin oxide are performed in situ. A patterned silicon wafer is placed in the apparatus ready to be etched and is then removed directly to a furnace for a further oxidation step, the wet etch, the photoresist removal, and pre-clean occurring, in a sequential process within a single apparatus. This results in less handling of the wafer, a decrease in processing time, and, consequently, less exposure to cleanroom air. The result is an oxide of higher quality, as expressed in measures such as the charge to break down, QBD, a measure of the maximum charge which may be placed across the oxide layer.
According to another aspect of the present invention, the amount of processing apparatus is reduced. By combining the etch, resist removal, and pre-clean steps, a single apparatus performs these processes in situ, thereby reducing equipment requirements.
In a further aspect, by a suitable choice of parameters and the use of a Buffered Oxide Etchant (BOE), higher wafer yields and reliability are obtained.